最新なARM EN0-001問題集（210題）、真実試験の問題を全部にカバー！

質問 1：
A program running on a development board that is connected to a host using a debugger can access a file on the host by using:
A. Polling
B. Semihosting
C. Virtual I/O
D. Memory mapping
正解：B

質問 2：
An advantage of removable flash memory over built-in flash memory is that:
A. It takes up less physical space in a device, and does not require any space on the printed circuit board.
B. It is quicker to access, providing far greater bandwidth for read operations.
C. It has a longer life, indicated by being rated for a higher number of write cycles.
D. Storage can be easily replaced, for example to increase capacity.
正解：D

質問 3：
An ARMv7 implementation might include the VFPv4-D32 floating point extension. What does the '32' indicate?
A. The number of integer operations that can be performed simultaneously
B. The number of double precision floating point registers implemented
C. The width of the datapath in bits
D. The number of bits of data that can be loaded or stored at once
正解：B

質問 4：
If a 16-bit Thumb instruction causes a Data Abort, which instruction would return from the handler to the instruction after the one that caused the data abort?
A. SUBS PC, LR-#4
B. SUBS P LR, #6
C. SUBS PC. LR
D. SUBS PC, LR, #8
正解：B

質問 5：
Is it possible to use an interrupt controller based on the Generic Interrupt Controller (GIC) architecture in a device built around a single core Cortex-A9 MPCore processor?
A. No, they are completely incompatible
B. Yes, all Cortex-A9 MPCore processors include an integrated GIC
C. No, a GIC is only compatible with multi-core Cortex-A9 processors
D. Yes, but a dummy second processor has to be included
正解：B

質問 6：
Implementing loops using a decrementing counter which exits the loop when a counter reaches zero can be beneficial for power and performance. This is because:
A. Decrementing variables uses less power than incrementing them.
B. A simpler branch instruction can be used.
C. The loop termination condition check can be integrated into the subtract operation.
D. The decrement and branch operations can be encoded as a single instruction.
正解：C

質問 7：
Using a Generic Interrupt Controller (GIC), when the interrupt handler writes to the End of Interrupt Register (ICCEOIR), which of the following state transitions might occur for that interrupt ID?
A. Inactive to Active
B. Active to Pending
C. Active to Inactive
D. Pending to Active
正解：C

質問 8：
When applied to locations in memory configured using a write-back cache strategy, what does a data cache 'clean' operation do?
A. Speculatively preloads data into the cache
B. Writes dirty data cache lines to memory and marks those lines as invalid
C. Reloads dirty data cache lines from memory
D. Writes dirty data cache lines to memory
正解：D